IBM Announces Chips with 50% Performance Boost and Lower Power Use

IBM has unveiled a new semiconductor technology that promises computer chips with 50% better performance and significantly reduced power consumption. The company, based in Armonk, New York, stated it could see the path to production within five years. This breakthrough comes as the tech industry grapples with concerns over energy use and seeks to pack more computing power into smaller devices.

The new “0.7-nanometer” technology developed by IBM represents a significant leap forward from Taiwan’s TSMC’s current 2-nanometer chips, which are already being mass-produced globally. The nanometer scale doesn’t refer to the literal size of chips but indicates how densely packed transistors can be on a chip.

IBM’s new chip is projected to offer up to 50% more performance and 70% greater energy efficiency compared to its current 2-nanometer node chips, which could have significant implications for data centers dealing with AI’s high power demands.

The technology uses a three-dimensional architecture called “nanostack,” stacking transistor layers on top of each other rather than arranging them in a single layer. This approach not only boosts performance but also improves energy efficiency by 40% in SRAM memory chips, a first seen in decades.

IBM isn’t ready to mass-produce the new chip yet, with the company expecting to reach manufacturing within five years. The production process is complex and requires advanced equipment, expertise, and significant investment. IBM currently licenses its designs to companies like Japan’s Rapidus for scaling 2-nanometer production. TSMC is developing a “1.4-nanometer” technology aimed at mass production by around 2028.